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Track OmniVision Technologies hiring and firing trends, filtered by title, location, type, date, category and date of posting.

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Ticker Symbol Entity Name Domain As Of Date Title URL Brand Category Location Text City State Country Posted Date Number of Openings Description Date Added Date Updated GICS Sector GICS Industry
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Digital Design Engineer/Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:  The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVision's future generation multi-media products Responsibilities:  Primary (70%):Provide detailed block-level design and documents; develop and execute thorough block level simulation and lab verification plan; participate in the FPGA platform development and lab debugging. Secondary (30%):Participate in block level architecture design; assisting embedded FW development. Requirements:        MSEE/CE with 3+ years of industry experienceStrong analytical, and problem solving skills as well as hands-on lab debugging skillsGood knowledge of RTL simulation and synthesis. Knowledge of design for low power and design for test (DFT)Able to write C/C++ code to model RTL blocks for simulation and verification.Able to write reusable Verilog RTL codes, follow design and DFT guidelines.Able to write verification test plans, and be able to run synthesis, static timing analysis, formal verification.Knowledge in languages relevant to the ASIC development process including Verilog, Unix Scripting, Perl, and Tcl.DSP function implementation experience is a plus.Self-motivated, excellent communication skills and ability to excel in a team environment. Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Analog Design Engineer Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:As an Analog IC Design Engineer you will perform analog and mixed signal design, characterization and evaluation of analog circuitry for ADC/DAC's, PMU's, and other base band analog circuits Responsibilities:Design and R&D analog circuit, ADC/DAC, PMU and other base band analog circuitUse EDA tool to run simulation and function verification.Guide layout engineer to optimize layoutChip debug and testing individuallyDesign and optimize chip layout Requirements:Experience, Skills and Education:MSEE in analog IC design;Experience in Cadence EDA tools and other usual EDA tools;Team player with good communication skills;Specialty in EE and Microelectronic;Minimum 3 years of experience in mixed signal circuit design for Master's degree ;Demonstrate good knowledge and experience in advanced analog and mixed-signal circuit design, experience in one or more of the following circuits, is a plus:- Audio CODEC;- SAR ADC- Sigma-Delta ADC/DAC- Video DAC- SRAM Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Algorithm Engineer/Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:Be responsible to research and develop of image processing and pattern recognition algorithms. Responsibilities:Research and develop still/motion image processing algorithms based on our SENSOR or APPLICATION;Research and develop the corresponding algorithms of PATTERN RECOGNITION;Algorithm simplification in MATHEMATICS or HARDWARE.Algorithm integration in system architecture.Algorithm testing and verification; Requirements:Experience in still/motion image processing;Strong mathematics background, and algorithm designing ability;Excellent programming skills in C/C++ and matlab;Experience in algorithm optimization including software and hardware;Excellent verbal and written communication skills. Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Sensor Application Engineer/ Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:The ideal candidate should have an electrical or computer engineering or color imaging background and possesses knowledge and experience to help solve various image sensor related system level application issues. He/she should also have a good understanding of sensor architecture and image processing in its role to evaluate and improve image quality. Basic knowledge about CMOS and pixel design is a plus. Strong communication skills is a definite plus as you will be working with different internal departments. Responsibilities:Sensor Verification: works closely with design team to verify each function of the new sensor, evaluates image quality to see if it meets the design target and application requirements and identifies alternate solutions if issues can't be addressed by designSensor Reference Design: designs testing and standard demo boards, reviews customer designs, builds software script for sensor evaluation and demo, makes special reference design based on customer’s requirement and checks EMI / EMC performance.Creates and maintains datasheet, applications notes.Delivers useful, accurate information to help various image sensor applications - expanding the new applications with image sensor.Directs customer support and helps FAEs support their customers. Helps customers bring up and troubleshoot their system. Tunes image quality based on the customer's requirement to win the competition (FAE training; customer demo, etc.). Requirements:Experience & Skill: 3 YearsBSEE, CSEE or related field, or equivalent work experience, MSEE is a plusKnowledge of color imaging process, image quality and image sensorSystem level hardware design and debug, firmware and software experience is a plusGood communication skillsOccasional travel is required Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Analog Design Engineer/ Sr. (High Speed) Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:as a member of high-speed design team, he(she) will be involved in high-speed IP design such as serdes/transmitter/receiver/pll/cdr in MIPI C/D/M-PHY, USB2.0/3.0 PHY etc., as well as other mainstream high-speed protocol based phy. He (she) will also serve as analog project leader after training. Responsibilities:PLL design supportOther Mixed signal design (MIPI, USB etc.) supportTest & debug for product Requirements:1) 3+ year industry experience;2) experience in pll design;3) Hands-on circuit design skills;4) Experience with high-speed design (serdes/transmitter/receiver) is a plus. Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 22nd, 2019 12:00AM Backend Design Engineer/Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview: The candidate will join a team of highly competent P&R designers, and responsible for physical design including P&R and physical verification Responsibilities: Responsible for full chip implementation from netlist to GDSII including floorplaning, place and route, power analysis, crosstalk analysis, timing closure and physical verification.;Also responsible for block level physical designHelp develop the PR flow Requirements:Education Major: BSEE/CE or MSEE/CEExperience & Skill: 3 Years  More than 3 year of PR related work experienceFamiliar with physical design flow/tools. Experience with Cadence SOC-Encounter is a plus.Successful tape-out experience is a strong plus.Analog/Mixed-signals design experience is a plus.Good programming skill (Perl/TCL) is a plus.Must be a good team player and have a good communication skills. Aug 21st, 2019 11:38PM Aug 21st, 2019 11:38PM
nasdaq:ovti www.ovt.com www.ovt.com Aug 23rd, 2019 12:00AM Digital Design Engineer/Sr. Open ENGINEERING Wuhan, China Wuhan Hubei CHN Jun 13th, 2019 12:00AM Position Overview:  The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVision's future generation multi-media products Responsibilities:  Primary (70%):Provide detailed block-level design and documents; develop and execute thorough block level simulation and lab verification plan; participate in the FPGA platform development and lab debugging. Secondary (30%):Participate in block level architecture design; assisting embedded FW development. Requirements:        MSEE/CE with 3+ years of industry experienceStrong analytical, and problem solving skills as well as hands-on lab debugging skillsGood knowledge of RTL simulation and synthesis. Knowledge of design for low power and design for test (DFT)Able to write C/C++ code to model RTL blocks for simulation and verification.Able to write reusable Verilog RTL codes, follow design and DFT guidelines.Able to write verification test plans, and be able to run synthesis, static timing analysis, formal verification.Knowledge in languages relevant to the ASIC development process including Verilog, Unix Scripting, Perl, and Tcl.DSP function implementation experience is a plus.Self-motivated, excellent communication skills and ability to excel in a team environment. Aug 23rd, 2019 12:21AM Aug 23rd, 2019 12:21AM
nasdaq:ovti www.ovt.com www.ovt.com Aug 23rd, 2019 12:00AM Digital Design Engineer/Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:  The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVision's future generation multi-media products Responsibilities:  Primary (70%):Provide detailed block-level design and documents; develop and execute thorough block level simulation and lab verification plan; participate in the FPGA platform development and lab debugging. Secondary (30%):Participate in block level architecture design; assisting embedded FW development. Requirements:        MSEE/CE with 3+ years of industry experienceStrong analytical, and problem solving skills as well as hands-on lab debugging skillsGood knowledge of RTL simulation and synthesis. Knowledge of design for low power and design for test (DFT)Able to write C/C++ code to model RTL blocks for simulation and verification.Able to write reusable Verilog RTL codes, follow design and DFT guidelines.Able to write verification test plans, and be able to run synthesis, static timing analysis, formal verification.Knowledge in languages relevant to the ASIC development process including Verilog, Unix Scripting, Perl, and Tcl.DSP function implementation experience is a plus.Self-motivated, excellent communication skills and ability to excel in a team environment. Aug 23rd, 2019 12:21AM Aug 23rd, 2019 12:21AM
nasdaq:ovti www.ovt.com www.ovt.com Aug 23rd, 2019 12:00AM Analog Design Engineer Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:As an Analog IC Design Engineer you will perform analog and mixed signal design, characterization and evaluation of analog circuitry for ADC/DAC's, PMU's, and other base band analog circuits Responsibilities:Design and R&D analog circuit, ADC/DAC, PMU and other base band analog circuitUse EDA tool to run simulation and function verification.Guide layout engineer to optimize layoutChip debug and testing individuallyDesign and optimize chip layout Requirements:Experience, Skills and Education:MSEE in analog IC design;Experience in Cadence EDA tools and other usual EDA tools;Team player with good communication skills;Specialty in EE and Microelectronic;Minimum 3 years of experience in mixed signal circuit design for Master's degree ;Demonstrate good knowledge and experience in advanced analog and mixed-signal circuit design, experience in one or more of the following circuits, is a plus:- Audio CODEC;- SAR ADC- Sigma-Delta ADC/DAC- Video DAC- SRAM Aug 23rd, 2019 12:21AM Aug 23rd, 2019 12:21AM
nasdaq:ovti www.ovt.com www.ovt.com Aug 23rd, 2019 12:00AM Algorithm Engineer/Sr. Open ENGINEERING Shanghai, China CHN Jun 13th, 2019 12:00AM Position Overview:Be responsible to research and develop of image processing and pattern recognition algorithms. Responsibilities:Research and develop still/motion image processing algorithms based on our SENSOR or APPLICATION;Research and develop the corresponding algorithms of PATTERN RECOGNITION;Algorithm simplification in MATHEMATICS or HARDWARE.Algorithm integration in system architecture.Algorithm testing and verification; Requirements:Experience in still/motion image processing;Strong mathematics background, and algorithm designing ability;Excellent programming skills in C/C++ and matlab;Experience in algorithm optimization including software and hardware;Excellent verbal and written communication skills. Aug 23rd, 2019 12:21AM Aug 23rd, 2019 12:21AM

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